Chris Collins

Tools · electronics

Capacitors and impedance

Capacitor energy and charge, rectifier ripple and hold-up sizing, supercapacitor backup time, MLCC DC-bias derating, ESR heating and electrolytic life, series stacks with balancing resistors, a comparison of capacitor types — and |Z| and phase of real capacitors, inductors, and resistors, LC tanks, and decoupling networks.

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How to use it

Values accept engineering notation (4n7, 100nF, 2.2µ, 3V3).

  • Energy & charge — E = ½CV², Q = CV, and the time to charge to (or discharge down to) a voltage through a resistor: t = −RC·ln(1 − V/Vs) and t = RC·ln(V₀/V).

  • Ripple & hold-up — the reservoir capacitor after a rectifier, Vr ≈ I/(2fC) for full-wave and I/(fC) for half-wave, with the diodes' conduction time θ = acos(1 − Vr/Vpk) and the capacitor’s RMS ripple current estimated by treating each charging pulse as a rectangle: I_rms ≈ I·√((1 − x)/x), where x is the share of the cycle the diodes conduct. Usually 2–3 times the load current, which is why reservoir capacitors are chosen for ripple-current rating. Hold-up for a switch-mode load (constant power): C = 2Pt/(V₁² − V₂²). Supercapacitor backup through a converter of efficiency η: t = η·C·(V₁² − V₂²)/(2P), with the ESR drop at the end of discharge, when the current is highest.

  • MLCC DC bias — class-2 ceramics (X5R, X7R, Y5V) lose capacitance as DC voltage is applied: a 10 µF 16 V X5R in 0603 often keeps under half its value at 5 V. The curve here is a rough typical model, C/C₀ = 1/(1 + (V/Vh)ⁿ), with the half-capacitance voltage Vh growing with case size; real parts vary by maker and series, so use the makers' simulators (linked in the tool) for a design. C0G/NP0 doesn’t change with bias.

  • ESR, heat & life — ESR from the dissipation factor, ESR = tan δ/(2πfC); the power the ripple current dissipates, I²·ESR; the core temperature rise from a thermal resistance; and the aluminium-electrolytic life estimate L = L₀·2^((T₀ − T)/10), the 10 °C rule.

  • Series & parallel — totals for any list of capacitors, and for electrolytics in series the largest balancing resistor that keeps each within its rating despite differing leakage: R ≤ (n·Vmax − Vtotal)/((n − 1)·ΔI), taking ΔI as the typical maximum leakage 0.01·C·V µA (or 3 µA). Also the worst transient voltage share when the capacitors' values differ by their tolerance.

  • Impedance — |Z| and phase from a start to an end frequency for a real capacitor (C + ESR + ESL: its |Z| bottoms out at the ESR at the self-resonant frequency, then rises as an inductor), a real inductor (L + winding resistance, shunted by its self-capacitance), a real resistor (R + lead inductance, shunted by stray capacitance), and a parallel LC tank with f₀ = 1/(2π√LC), Q = X/r, bandwidth f₀/Q, and impedance Q²r at resonance.

  • Decoupling network — several groups of capacitors in parallel, each with its ESR, ESL, and count. The plot shows the combined impedance and each group on its own, marks the anti-resonance peaks where one capacitor has turned inductive while the next is still capacitive, and checks the network against a target impedance (allowed ripple ÷ transient current). Mounting inductance — pads, vias, and the path to the planes — adds roughly 0.3–1 nH per capacitor: include it in the ESL.

  • Types compared — C0G and class-2 ceramics, aluminium electrolytic and polymer, tantalum, polypropylene and polyester film, silver mica, and supercapacitors: typical ranges, tolerance, stability, ESR, and uses.

Reactance, LC resonance, and RC time constants with charge curves are also in Timing, filters, and analog design; series and parallel networks in Circuit calculators; capacitor marking codes in Resistor colours & codes; coil design in Coils and inductors; and converter input and output capacitors in Power supplies.

Everything here is an estimate from datasheet-style parameters: check the actual part’s datasheet for ripple-current ratings, frequency multipliers, DC-bias curves, and life.

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