KiCad footprint and symbol checker

A footprint you drew yourself, or downloaded from a part vendor, is the part of a board nobody else has checked. This page looks at each one the way a library reviewer would and tells you what it found and why it matters. Everything runs in your browser.

How to use it

Open .kicad_mod footprints — several at once, or a whole .pretty folder (it is just a folder of them) — and .kicad_sym symbol libraries; or drop them on the page. KiCad 6 to 9 files are read, and KiCad 5 footprints ((module …)) too. A few samples open first: a clean SOIC-8, an SMD footprint with a dozen problems on purpose, a through-hole header with hole troubles, a KiCad 5 resistor, and a symbol library with a clean regulator and a broken chip.
The list shows each footprint (▭) and symbol (⏚) with its count of errors, warnings and notes; pick one to see it drawn — copper (front in copper, back in blue), holes, paste openings, silkscreen, the fab layer and the courtyard, with the origin marked; or the symbol’s body and pins on a 100 mil grid, hidden pins dashed.
Each finding has a severity — error (will cause a wrong board or a failed check), warning (likely trouble, or against common practice), note (style and documentation) — the rule, what was found, and a short why. Click a finding with ⌖ to ring the spot on the drawing.
Hole and silkscreen limits: by default the annular ring, smallest drill and silkscreen width and clearance follow KiCad’s own library practice (0.15 mm ring, 0.2 mm drill, 0.1 mm silk, 0.15 mm silk to pad). Choose JLCPCB, PCBWay or OSH Park to use the numbers the Gerber viewer checks against for that fab instead (JLCPCB’s 0.15 mm minimum silkscreen line, for example, is thicker than KiCad’s usual 0.12 mm).
Report CSV downloads every finding for every open file.

What is checked

Footprints:

name — matches the file name (KiCad lists a footprint by its file name), uses plain characters, and the value field matches;
attribute — all-SMD footprints marked SMD and through-hole ones marked through-hole, because the attribute decides whether the part reaches the position file (see the pick-and-place file fixer);
courtyard — present; enclosing the pads and the fab outline with a margin of 0.25 mm (0.15 mm for 0402 and smaller chips, 0.5 mm for connectors, 1 mm for BGAs); 0.05 mm lines on a 0.01 mm grid;
pin 1 — a pad numbered 1 (or A1); on parts that could be fitted turned (any 90°, 180° or 270° turn that maps the pads onto themselves but moves pin 1), the silkscreen (a warning) and the fab drawing (a note) must not look the same after that turn — the check is geometric, so a dot, a tick, a chamfer or a longer line all count; through-hole pin 1 drawn differently from the others;
silkscreen — clear of pads (on the pad is an error, closer than the clearance a warning) and not thinner than the limit;
reference and value — the reference on the silkscreen, the value and a ${REFERENCE} text on the fab layer (for assembly drawings);
holes — pad bigger than its hole, annular ring ((pad − hole) ÷ 2, per axis for slots) at least the limit, smallest drill; thermal vias in an exposed pad are left alone;
paste — every SMD pad has a paste opening (fiducials, test points and the like excepted), the opening after the paste margin and ratio is not tiny, and a large exposed pad gets less than full coverage (by a negative ratio or separate paste windows, whose coverage is measured);
origin — SMD footprints centred on the origin (on the pads or the body), through-hole ones at pin 1 or the centre;
documentation — a description, keywords and a 3-D model.

Symbols:

grid — pin ends on the 50 mil grid (an error otherwise) and on 100 mil (a note); pin lengths in 50 mil steps;
overlapping pins — different pins on one spot are an error; stacked pins of one name are fine, but only one should be visible;
pin numbers — each used once per body style (the same pin repeated in each unit of a multi-unit part is noted, not flagged);
power — pins named like supplies (VCC, VDD, GND, VBAT …) typed as power input or output; no pins of the "unspecified" type; hidden power-input pins (they join a net of the same name by themselves) warned about; power symbols (#PWR) carrying the power flag and a single power-input pin;
fields — reference prefix letters only and upper case (unusual prefixes noted), footprint in Library:Name form or left empty with footprint filters for a generic symbol, a datasheet link (~ is noted), a description and keywords.

About the rules

These rules follow the spirit of the KiCad Library Conventions (KLC), the guidelines the KiCad library team reviews contributions against, but they are written here in my own words and implemented from scratch; they are not the KLC and do not use its numbering. Where the KLC gives a number (line widths, courtyard margins, grids) I’ve used the same value; a few checks are stricter or looser, and some KLC rules (naming schemes per package family, 3-D model paths, text sizes) are not checked. I tuned the thresholds by running the checker over a few thousand of KiCad’s own footprints and symbols, which come out almost clean (the few findings there are real: silkscreen a hair inside the clearance, a thermal-via ring under 0.15 mm). A clean report is not a guarantee, and a warning on a vendor footprint may be deliberate.

Related: Gerber viewer and DFM check (the whole board, against a fab’s limits), pick-and-place file fixer, SMD packages and footprints, KiCad BOM rollup.

Browser support

Any current browser. Opening a whole folder uses the folder picker of Chrome, Edge, Firefox and Safari; in any browser you can select all the .kicad_mod files inside it instead.

Privacy

Your files are read in this browser and are not uploaded or kept after you close the page. Only the limit choice and the layer switches are remembered.