Logic levels and level shifting

Compatibility — a driver’s guaranteed output levels (V_OH min, V_OL max) against a receiver’s thresholds (V_IH min, V_IL max): the high noise margin is V_OH − V_IH and the low margin V_IL − V_OL, and both must be positive. The tool also flags over-voltage when the driver swings above the receiver’s maximum input. The matrix shows every pairing at once. Figures are datasheet guarantees under light-to-moderate load (JEDEC JESD8 for the LVCMOS families); on a bench a 3.3 V signal often works into a 5 V AVR, but it is not guaranteed over temperature.

Level shifters — for two supply voltages, a data rate, and whether the line is bidirectional or open-drain, the options that work: a resistor divider (down only), the BSS138 MOSFET shifter (I²C, 1-Wire), PCA9306-style I²C translators, the TXS0108E and TXB0108 auto-direction parts (the TXB cannot drive pull-ups or open-drain buses), direction-pin translators such as the 74LVC1T45, and a 74AHCT buffer at 5 V for 3.3 V → 5 V (WS2812 data).

Divider — R2 = R1·V_out/(V_in − V_out); its output impedance R1‖R2 and the receiver’s input capacitance set a bandwidth 1/(2π·(R1‖R2)·C), which limits the data rate.

Open-drain pull-ups — a pulled-up line rises along an RC curve: t = R·C·ln1 − V₁/V_DD)/(1 − V₂/V_DD, 0.8473·R·C from 30% to 70% (the I²C definition, NXP UM10204). The tool gives the rise time, the time to reach V_IH, the sink current against the pins' I_OL, and the largest pull-up for a target rise time.