Yield, chiplets and weights-in-silicon
Why big chips are expensive and why AI accelerators are built from chiplets: Murphy, Poisson and negative-binomial die yield, dies per wafer and cost per good die, splitting a design into chiplets with known-good-die testing against the 858 mm² reticle, and the silicon a model needs when its weights are etched into mask ROM.
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How to use it
Three tabs:
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Yield & cost per die — die area (and aspect ratio), defect density D0 and a yield model give the fraction of good dies. Dies are counted whole on a grid inside the wafer’s usable circle (the classic formula is shown beside the count), and wafer cost ÷ (dies × yield) is the cost of each good die. A chart plots yield against area for all three models with the 858 mm² reticle marked, and a wafer map shows good and defective dies.
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Chiplets — one design built as a single die or split into n chiplets (plus any die-to-die interface overhead). With known-good-die testing only working chiplets are bonded, so the package yield is just the bond yield; without it, untested dies go in and the package works only if all of them do. It shows cost and silicon per good part for all three, and flags a design too big for one exposure. Wafer cost and yield model come from the first tab.
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Weights in silicon — the die area a model of N parameters needs at a mask-ROM density, in mm², cm² and reticles: Taalas’s HC1 density (Llama 3.1 8B in 815 mm² on TSMC N6), the conventional compute-in-ROM estimate from the BitROM paper (7B in more than 1,000 cm² at 14 nm), or your own.
The models: Poisson Y = e−AD; Murphy Y = ((1 − e−AD) / AD)2; negative binomial Y = (1 + AD/α)−α, with A in cm² and D0 in defects per cm².
Where the book’s figures differ
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"More than 1,000 cm²" for a 7B model is 100,000 mm² ÷ 858 = 116.6 reticles — at least 117 dies, slightly more than the book’s "roughly 116×".
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At a mature defect density (0.1/cm²) a full-reticle die yields about 0.45 against 0.81 for a quarter-size chiplet (Murphy): about half, not "a small fraction". The gap becomes large only at higher defect densities (0.05 against 0.38 at 0.5/cm²).
Limits
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Yield here is defect-limited (random particles). Parametric and systematic yield loss, redundancy and repair (spare cores, fused-off units — how big GPUs really ship) are not modelled; real large dies yield better than these formulas because of them.
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Wafer costs are published estimates (CSET 2020 for 7 nm and 5 nm; press reports for 3 nm), not foundry prices. Test, packaging and interposer costs are a single input.
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The wafer map marks a share of 1 − yield of the dies as defective for illustration; real defects cluster.
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The mask-ROM densities are derived from two published figures (one whole product die, one paper estimate), not from a cell library.
Sources
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Murphy, "Cost-size optima of monolithic integrated circuits", Proc. IEEE 52 (1964); Stapper, "On yield, fault distributions, and clustering of particles", IBM J. Res. Dev. 30 (1986).
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CSET, "AI Chips: What They Are and Why They Matter" (2020) — wafer-cost estimates.
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BitROM: Weight Reload-Free CiROM Architecture Towards Billion-Parameter 1.58-bit LLM Inference (ASP-DAC 2026) — "LLaMA-7B … exceeding 1,000 cm² in 14nm CMOS".
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Taalas HC1: Llama 3.1 8B in an 815 mm² TSMC N6 die (company statements and press, 2026), as cited in the book.
Related: AI hardware calculator (what those dies compute and how much memory a model needs), AI cost and energy economics (from the cost of a chip to the cost of a token).
Companion to Chiplets and Packaging, From Design to Silicon and Weights-in-Silicon of _AI Acceleration: From Transistors to Trillion-Parameter Models.
Linking to an example
Links can be written by hand. Add the tab after #: yield, chiplets or rom. Settings not in
the link take their defaults.
| Parameter | Meaning | Example |
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Die area, mm² (Yield tab) |
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Aspect ratio, height ÷ width |
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Defect density, per cm² |
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Clustering α for the negative binomial |
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Wafer diameter, edge exclusion and scribe lane, mm |
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Wafer-cost preset: |
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Wafer cost, $ |
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Design area, mm² (Chiplets tab) |
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Number of chiplets |
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Die-to-die overhead per chiplet, % |
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Defect density for the chiplets tab, per cm² |
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Packaging $ per package |
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Bond yield per die, % |
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Parameters, billions (Weights in silicon) |
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Custom density, weights per mm² |
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Defect density for the ROM die’s yield |
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One of the presets below; parameters given with it override the preset’s |
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In a URL + means a space: write wpm=1e7 or 1e%2B7; a hand-typed 1e+7 also works.
Presets:
example= |
Shows |
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An 8 cm² die at D0 = 0.1/cm²: Murphy yield 0.47 (open) |
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A 2 cm² die at the same density: 0.82 (open) |
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The 8 cm² die under the harsher Poisson model: 0.45 (open) |
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A full 26 × 33 mm reticle-size die: dies per wafer and cost per good die (open) |
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One 858 mm² die against four quarter-size chiplets with known-good-die testing (open) |
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Two reticle-size dies (B200-style): ≈ 1,600 mm² that one exposure cannot print (open) |
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Taalas HC1: Llama 3.1 8B in 815 mm², just under the reticle (open) |
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A 7B model in conventional mask ROM: more than 1,000 cm², at least 117 reticles (open) |
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A 405B model at Taalas’s density: ≈ 41,000 mm², 48 reticles (open) |
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