Chris Collins

Tools · electronics

USB-C and Power Delivery

How USB-C ports agree on power — the Rp/Rd/Ra resistors on CC, orientation and VCONN, what to put on your board, the PD frame in 4b5b and BMC, a message decoder and builder (Fixed, PPS and AVS PDOs, RDOs, EPR), the negotiation timeline, PPS direct charging, which charger supplies a given voltage under the power rules, trigger chips with their resistor tables, cables, and legacy BC1.2/Apple/QC charging.

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How to use it

USB-C replaced the old "5 V is always there" rule with a negotiation. Two resistors on the CC pins decide who is the source, which way round the plug is, and how much current is on offer at 5 V; USB Power Delivery messages on the same wire then agree on anything from 3.3 V to 48 V. This tool covers both layers and the parts you need to use them.

How to use it

  1. Type-C roles — pick what the source advertises and how its Rp is built, the far end (a proper sink, a sink with one shared resistor, an audio or debug accessory, another source) and the cable (plain or e-marked, and in which plug). The drawing shows the voltage on each CC pin, what the source concludes, which pin carries VCONN, and the current the sink reads. Choose Sink: one 5.1 kΩ shared with an e-marked cable to see the classic failure.

  2. My board — choose a sink-only 5 V device, a source, a USB 2.0 device, an audio accessory or a debug accessory, and get the CC network, the parts list and why.

  3. On the wire — any message (or the Builder’s) drawn bit by bit: the preamble, the SOP ordered set, each 5-bit symbol with its nibble, the CRC and EOP, and the BMC waveform; with the frame length and duration.

  4. Decoder — paste a message or a whole capture, one per line, as bytes (with or without CRC) or a header and 32-bit words. Each header field and data object is decoded: Source/Sink_Capabilities PDOs (Fixed, Variable, Battery, PPS, SPR and EPR AVS), Request RDOs (read against the PDO they point at), BIST, EPR_Mode, VDM headers and cable VDOs, and chunked extended messages such as EPR_Source_Capabilities, which are reassembled. The CRC is checked.

  5. Builder — compose a message (capabilities from the power rules, a Request, any control message, BIST, EPR_Mode, EPR_Source_Capabilities) and get its bytes and CRC, then open it in the decoder or on the wire.

  6. Negotiation — the message sequence for a fixed 20 V contract, a PPS contract and EPR entry to 28 V, with the timers that bound each step; Show every GoodCRC adds the acknowledgements.

  7. PPS — pick an APDO and ask for a voltage and current limit: see it snapped to the 20 mV / 50 mA grid and the RDO, and a simulated direct charge of a Li-ion cell.

  8. Chargers & cables — enter what your device needs and see which charger power levels are required to supply it (fixed PDO), which could with PPS or AVS, and which would need a step-down; the power-rules table; the cable you need; and a Cable VDO decoder.

  9. Trigger chips — CH224K, IP2721, HUSB238A, FUSB302B + MCU and STUSB4500 with their configuration tables, a schematic sketch for the voltage you choose, and notes.

  10. Legacy charging — BC1.2 SDP/CDP/DCP, Apple divider voltages, Samsung and Quick Charge 2/3, as tables and a decoder for measured D+/D− voltages.

How it works

  • CC detection is a resistor divider. The source’s Rp (a pull-up or current source) meets the sink’s 5.1 kΩ Rd, and the voltage tells both sides what is there: below vRa (0.2 / 0.4 / 0.8 V depending on the advertisement) is Ra, the ≈1 kΩ VCONN load of an e-marker; up to vOPEN (1.6 / 2.6 V) is Rd; above that is open. The sink reads the same voltage against 0.66 V and 1.23 V to learn default, 1.5 A or 3.0 A. A cable carries only one CC wire; the plug’s other CC contact is VCONN. So the pin that sees Rd gives the orientation.

  • The shared-resistor mistake — with CC1 and CC2 tied to one Rd, the cable’s CC wire is joined to the far plug’s VCONN contact. In an e-marked cable that contact has Ra, so the source sees 5.1 kΩ ∥ 1 kΩ ≈ 0.84 kΩ, which reads as Ra. With Ra in both plugs it looks like an audio accessory. Either way, VBUS stays off.

  • The physical layer — 300 kbit/s ±10 % biphase mark coding on CC. A frame is a 64-bit preamble, a 4-symbol ordered set (SOP, SOP', SOP'' …), then the header and data objects in 4b5b, low nibble first and each symbol LSB first, then CRC-32 (IEEE 802.3, over the header and data, little-endian), then EOP.

  • Objects follow the PD 3.2 bit layouts: Fixed PDOs in 50 mV / 10 mA units, PPS APDOs in 100 mV / 50 mA, EPR AVS with a 9-bit maximum voltage and a PDP in watts, PPS RDOs in 20 mV / 50 mA and AVS RDOs in 25 mV (with the low two bits zero). An RDO has no type of its own: its object position points back into the Source_Capabilities, which is why the decoder keeps the last one it saw.

  • Power rules (PD §10) — a source of a given PDP must offer 5 V up to 3 A, 9 V above 15 W, 15 V above 27 W and 20 V above 45 W, each at PDP/V up to 3 A (5 A for 20 V above 60 W, with a 5 A cable); EPR adds 28, 36 and 48 V at 5 A and an AVS from 15 V. The charger chooser applies these rules. A charger that meets them can always be relied on; PPS and anything else is optional, so it is listed as "only if offered".

  • PPS direct charging — the simulated cell follows a typical 1S Li-ion open-circuit curve with 50 mΩ internal resistance. The requested voltage is the cell voltage plus the path drop, rounded to 20 mV. Constant current runs to 4.2 V, then the current tapers.

Sources

  • USB Type-C Cable and Connector Specification, Release 2.3 — Rp/Rd/Ra values (Table 4-24), source and sink CC voltage thresholds, DRP timing, accessory modes.

  • USB Power Delivery Specification, Revision 3.2 — 4b5b table and ordered sets (§5.3–5.4), CRC (§5.6.2), message header and data objects (§6.2, §6.4), timers (§6.6), power rules (§10). The timer values shown are the spec’s limits; EPR keep-alive and entry values are from PD 3.1 and later.

  • USB Battery Charging Specification 1.2 — the SDP/CDP/DCP detection voltages.

  • Trigger chips — WCH CH224 data sheet; Hynetek HUSB238A data sheet (2024), Tables 8 and 9; onsemi FUSB302B data sheet; ST STUSB4500 data sheet (DS12499); Injoinic IP2721 data sheet (the SEL strap; the English documentation is thin, so check it against your part).

  • Apple divider and Samsung voltages are widely measured figures, not published specifications. Quick Charge levels are from Qualcomm’s QC 2.0/3.0 descriptions and teardown measurements.

Limits

  • The CC model uses nominal resistor values and thresholds; real parts have ±5–20 % tolerance, and the thresholds have ranges in the spec.

  • The decoder does not decode every extended message body (it shows the bytes), and it does not decode vendor-specific VDOs beyond the ID header and the cable VDO.

  • Real chargers often go beyond the power rules (12 V, extra PPS ranges, proprietary modes); the chooser only promises what the rules require.

Related: USB-C pinout, board power tree, power supply design, CRC calculator.

Linking

Share link copies a URL that opens the tool as you have it. Hand-written links can set the roles demo or the charger chooser, for example ?far=sink-shared&cable=emark-both#roles or ?v=20&i=5#chargers; chip=husb238a#triggers opens a trigger chip.

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