Bus protocols, simulated

SPI — mode 0–3 (the four small diagrams show CPOL and CPHA side by side; click one to use it), MSB or LSB first, the bytes the master sends on MOSI and the bytes the device answers on MISO (full duplex, one bit each way per clock), CS held for the whole transfer or toggled between bytes, and daisy chains of 2–4 devices, with the line between each pair of devices drawn.

I²C — a short script: S 0x76 W 0xD0 Sr 0x76 R 0x60 P is a register read (START, address with write, register number, repeated START, address with read, one byte back, STOP). Addresses above 0x7F are sent as 10-bit addresses; ~40 makes the slave stretch the clock for 40 µs. Bands on SDA show who is driving it, master or slave. Set the pull-up resistor and bus capacitance and the rising edges are drawn as the RC curves they really are, with a chart of rise time against pull-up value, the limits for 100 kHz, 400 kHz and 1 MHz from the I²C specification (UM10204), and the minimum pull-up for a 0.4 V low. Arbitration demo starts two masters at the same moment and shows the bit where one of them loses.

UART — baud rate, 5–9 data bits, parity, 1, 1.5 or 2 stop bits, normal or inverted, and the text or hex bytes to send. The dots on the line are where the receiver samples. The Baud rate tolerance panel works out how much clock error the frame survives at 16× or 8× oversampling, and lists the divisor and error for every standard baud rate at your clock (16 MHz gives the familiar −3.5 % at 115 200 baud).

1-Wire — reset and presence, write-0/write-1 and read slots, ROM commands (Read ROM, Match ROM, Skip ROM), a DS18B20 temperature conversion and scratchpad read with its CRC-8 checked. Search ROM runs the binary search from Maxim application note 187 over the devices you list: each pass is drawn as a waveform (two read slots and one write slot per ROM bit), and a grid of the devices' ROM bits shows which devices drop out as you step through it.

SD card — the SPI-mode start-up a microcontroller does before it can read a card: 80 clocks with CS high, CMD0, CMD8, CMD55 + ACMD41 until the card is ready, CMD58 to read the OCR (and CMD16 for standard-capacity cards), with every command frame, its CRC-7, and the R1, R3 or R7 response explained. Choose an SDHC, SDSC or old version 1 card.

JTAG — one step per line: RESET, IR 0xE/4 (instruction and length), DR 32 (shift 32 bits and read), TMS 0110, GOTO Pause-DR, IDLE 3. The TAP state machine is drawn beside it with the current state highlighted; click a state to add the shortest TMS path to it. Reading the IDCODE decodes its version, part number and JEDEC manufacturer.